Could AM5 support Strix Halo with MCM APUs such as the AI Max 385 or Max+ 395?
Could AM5 support Strix Halo with MCM APUs such as the AI Max 385 or Max+ 395?
Some key points to keep in mind: Strix Halo employs a quad channel memory controller setup. This would likely need either disabling the memory controllers or using binning techniques with discarded die sections. Since not all quad DIMM boards are identical, it seems improbable that standard AM5 boards could support this configuration. The overall package size seems compatible with the substrate dimensions of AM5, though verifying both is challenging. It appears feasible if only a couple of memory controllers require pads. Yield numbers for Strix Halo’s GCD/IOD are uncertain. It might be worth checking if some units included rejected controllers, as that could improve success rates. I don’t recall any cases where binning specifically targeted memory controllers. GPUs frequently encounter this issue—especially the GA102 with its varied memory bus widths. The wide SKU range suggests many configurations exist, but only certain variants might fit. I can’t think of examples showing a complete set of memory controllers in a single bin. For CCDs, performance depends heavily on core count and CU count, which are typically specified separately. I imagine a 6 or 8-core single CCD paired with a low-binned dual-channel IOD could be valuable on the market. It would significantly boost the capabilities of the 8700G, especially with its smaller L3 cache and 12CU iGPU. Given the support for 3D v-cache in Strix Halo, it’s conceivable a Zen5 CCD could be integrated. AMD’s “X3D” Mobile Chips seem like a strong contender, as APUs now include dedicated 3D v-cache TSVs. It’s possible AMD might opt for an FM3 board instead of sticking to AM5, though that seems unlikely. They’d probably prefer soldered CPUs over adding another socket. AM4 offered a solid upgrade from AM3/FM2+. We do know about single CCD variants like the AMD Ryzen Al Max 385, which includes a 32CU 8050S. These chips would likely be pricier but offer good value with a 1080p iGPU and a high-quality Zen5 CCD. Overall, I have an unused X870 motherboard that could benefit from one of these options.
For two main reasons: switching to dual-channel RAM would severely hurt its speed, and the design uses a lot of silicon. It would be extremely unbalanced and remain expensive unless we find cheaper quad-channel desktops or DDR6 memory. Socketed iGPUs naturally lag due to their architecture. Without affordable quad-channel desktops or new memory standards, this won’t become practical.
I compare it to something like the 8700G since it would effectively be a higher end version of it. Some could say the same about those chips, taking phoenix APUs and throwing them on AM5 substrates. There was likely a reason, I feel like strix halo could do the same, depending on yields. What's nice too, compared to something like a 9700x, a 8c/16t single CCD variant of strix halo with a 24CU IOD wouldn't lose performance compared to a 7700x vs 8700G. I'd assume it would cost +$200 more for that iGPU, and that might be worth it in some cases. We'll likely see a 9000G series, whether that's strix halo or strix point is questionable. Considering the upcoming Z2 Extreme APUs are binned strix point APUs, having reject strix halo IOD end up on AM5 doesn't sound far fetched to me. There's also this nice convenient gap between 16CU and 32CU: For clarification too, that AI Max Pro 380 is in fact strix halo and not strix point, 16MB of L3 cache and all: AMD Ryzen™ AI Max PRO 380 Actually, looking at that model specifically, it only has two memory controllers. 128-bit bus and not 256-bit bus.
It's not exactly a quad-channel setup; it uses a 256-bit bus memory interface. I'm not sure if Strix Halo's IMC supports standard DDR5, it seems to be LPDDR5 only. As mentioned before, reducing the memory bandwidth would severely impact the device's functionality, so you'd be better off with something like the 9950x. I recall hearing that it wouldn't fit there. That might not be accurate, but I can't look up details right now. Plus, switching from 256-bit to 128-bit would mean dropping to LPDDR5X-8000 and then to DDR5 5200~6400 in most cases.
It involves an 8x32-bit memory bus with a 'quad channel' design based on the diagram. From a binning perspective, it probably reflects how the CPU interprets it rather than how the CCD processes the same 256-bit bus. This pattern is already visible in comparisons like the 8700G's 780M versus the Z1 Extreme's 780M. Essentially, the same silicon can have different RAM and TDP setups. AMD Ryzen™ AI Max PRO noted there are also 128-bit versions available.
I remember Framework mentioning socketed RAM in their laptop design, though I couldn't get it to function properly. It seems they didn't specify the exact type of RAM used. Was it LPDDR or DDR? And did it actually support regular DDR memory? As for Strix Halo, it might stand out among x86 options due to its 3D cache concept. However, when many focus on gaming gains, it doesn’t seem particularly remarkable. Its performance aligns with what you'd expect given the silicon size and memory bandwidth. Some may appreciate avoiding VRAM shortages at the expense of fixed RAM capacity. Certain scenarios like big AI models could see benefits, but for most users it probably offers little real advantage.
The same chip isn't guaranteed to reach the desktop yet, but I believe a comparable version will appear in Zen6 Medusa under the codename APUs (AM5 socket) for desktop CPUs/APUs. These will include powerful NPUs and an onboard graphics unit similar to Strix Halo.
It seems focused on maintaining signal integrity using LPCAMM modules (two for a 256-bit bus). For everyday users, it offers a straightforward alternative to the complex DIY market, avoiding the chaos of the current GPU landscape. The 4070 mobile runs smoothly in a low TDP configuration.