F5F Stay Refreshed Hardware Desktop The strength of Apple Silicon comes from its processing capabilities, not primarily its memory.

The strength of Apple Silicon comes from its processing capabilities, not primarily its memory.

The strength of Apple Silicon comes from its processing capabilities, not primarily its memory.

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byDani_SMP
Member
59
04-26-2023, 01:57 AM
#11
I’m unsure about the reason behind that speed, but it seems tied to how memory and tech are arranged. That’s top-tier performance, and I expect Intel and AMD to push forward with innovation. Intel has let us down, so it’s disappointing. Yeah, yeah—those MTL sounds are annoying. If it’s not the CPU, the integrated graphics will need more bandwidth all day, which still counts as performance, right? How can they ignore such clear advantages in the competition?
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byDani_SMP
04-26-2023, 01:57 AM #11

I’m unsure about the reason behind that speed, but it seems tied to how memory and tech are arranged. That’s top-tier performance, and I expect Intel and AMD to push forward with innovation. Intel has let us down, so it’s disappointing. Yeah, yeah—those MTL sounds are annoying. If it’s not the CPU, the integrated graphics will need more bandwidth all day, which still counts as performance, right? How can they ignore such clear advantages in the competition?

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Fajitas_pvp
Junior Member
6
04-26-2023, 05:53 PM
#12
Memory bandwidth plays a role in certain applications, though not universally. To achieve such high speeds, systems increased the bus width. Standard x86 computers typically use a 128-bit bus for dual-channel memory. Bandwidth requirements vary by application—some are memory-independent while others depend on it. Epyc benchmarks provide insights into channel counts; you can find details at https://www.phoronix.com/review/ddr5-epyc-9004-genoa, which suggests potential performance exceeding 400GB/s with all 12 channels active.
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Fajitas_pvp
04-26-2023, 05:53 PM #12

Memory bandwidth plays a role in certain applications, though not universally. To achieve such high speeds, systems increased the bus width. Standard x86 computers typically use a 128-bit bus for dual-channel memory. Bandwidth requirements vary by application—some are memory-independent while others depend on it. Epyc benchmarks provide insights into channel counts; you can find details at https://www.phoronix.com/review/ddr5-epyc-9004-genoa, which suggests potential performance exceeding 400GB/s with all 12 channels active.

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ClayFish
Member
52
04-26-2023, 07:28 PM
#13
This processor is an extremely powerful machine compared to what most home computers can handle.
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ClayFish
04-26-2023, 07:28 PM #13

This processor is an extremely powerful machine compared to what most home computers can handle.

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HAR365
Member
162
04-27-2023, 03:13 AM
#14
Well? I provided a case study on memory scaling in software. For numerous applications, it doesn't matter much, and this clarifies whether the discussion relates to M chip performance.
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HAR365
04-27-2023, 03:13 AM #14

Well? I provided a case study on memory scaling in software. For numerous applications, it doesn't matter much, and this clarifies whether the discussion relates to M chip performance.

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DantehIsGay
Posting Freak
902
05-03-2023, 12:42 PM
#15
Consider how the performance is realized and what it implies for building your own PCs. If Intel and AMD integrated the memory into the CPUs themselves, you'd have to purchase a CPU with the desired memory capacity right from the start. This would lock memory upgrades unless you also upgrade the CPU. It would mean that manufacturers control how much RAM each CPU tier should have, rather than letting OEMs or DIY builders decide it. The decision on whether to provide more memory depends on cost rather than benefit. Unless your project falls into the rare category where memory speed is the main bottleneck, boosting bandwidth doesn’t help much—it’s essentially hitting diminishing returns. Regarding integrated graphics, as long as you can add a dedicated GPU, you don’t need an expensive one built into the CPU. For APU setups, it might be useful but remains limited to specific budget builds, often chosen for cost reasons rather than performance. Changing a CPU to include memory in the package would be costly and unlikely to reach affordable prices.
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DantehIsGay
05-03-2023, 12:42 PM #15

Consider how the performance is realized and what it implies for building your own PCs. If Intel and AMD integrated the memory into the CPUs themselves, you'd have to purchase a CPU with the desired memory capacity right from the start. This would lock memory upgrades unless you also upgrade the CPU. It would mean that manufacturers control how much RAM each CPU tier should have, rather than letting OEMs or DIY builders decide it. The decision on whether to provide more memory depends on cost rather than benefit. Unless your project falls into the rare category where memory speed is the main bottleneck, boosting bandwidth doesn’t help much—it’s essentially hitting diminishing returns. Regarding integrated graphics, as long as you can add a dedicated GPU, you don’t need an expensive one built into the CPU. For APU setups, it might be useful but remains limited to specific budget builds, often chosen for cost reasons rather than performance. Changing a CPU to include memory in the package would be costly and unlikely to reach affordable prices.

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Low_Focus
Junior Member
13
05-09-2023, 09:54 AM
#16
The article discusses the M1 Max's performance, highlighting that its CPU handles roughly 240 GB/s instead of the expected 400. It also notes the lack of comparable benchmarking for the M3 Max.
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Low_Focus
05-09-2023, 09:54 AM #16

The article discusses the M1 Max's performance, highlighting that its CPU handles roughly 240 GB/s instead of the expected 400. It also notes the lack of comparable benchmarking for the M3 Max.

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MCDark_Reaper
Member
146
05-10-2023, 09:46 AM
#17
Opt for a larger bus to capture most advantages of increased bandwidth. AMD is choosing this approach for their Strix APUs, moving away from the outdated 128-bit dual-channel setup that many devices still use.
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MCDark_Reaper
05-10-2023, 09:46 AM #17

Opt for a larger bus to capture most advantages of increased bandwidth. AMD is choosing this approach for their Strix APUs, moving away from the outdated 128-bit dual-channel setup that many devices still use.

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STQZ
Member
162
05-13-2023, 02:32 PM
#18
They mention an Instinct memory solution based on HBM3, which resides directly on the chip. Or are you asking about a different approach AMD is exploring for Strix?
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STQZ
05-13-2023, 02:32 PM #18

They mention an Instinct memory solution based on HBM3, which resides directly on the chip. Or are you asking about a different approach AMD is exploring for Strix?

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Bananenmatrix
Member
70
05-13-2023, 05:54 PM
#19
This device remains significantly superior to x86 processors.
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Bananenmatrix
05-13-2023, 05:54 PM #19

This device remains significantly superior to x86 processors.

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anogeep
Junior Member
5
05-13-2023, 10:00 PM
#20
This update includes HBM3 technology. It was revealed recently. If accurate, memory bandwidth will increase significantly.
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anogeep
05-13-2023, 10:00 PM #20

This update includes HBM3 technology. It was revealed recently. If accurate, memory bandwidth will increase significantly.

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