F5F Stay Refreshed Hardware Desktop The issues I have with multi-channel RAM mostly revolve around dual channels.

The issues I have with multi-channel RAM mostly revolve around dual channels.

The issues I have with multi-channel RAM mostly revolve around dual channels.

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Hidekih
Posting Freak
849
01-24-2024, 06:20 AM
#11
What is this about? Eight channels are already available on the server's CPU and HEDT chips.
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Hidekih
01-24-2024, 06:20 AM #11

What is this about? Eight channels are already available on the server's CPU and HEDT chips.

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humanity13
Member
202
02-01-2024, 03:20 AM
#12
He wants to know why dual channel bandwidth isn't possible on just one physical connection. He seems to have grasped this idea from a previous discussion.
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humanity13
02-01-2024, 03:20 AM #12

He wants to know why dual channel bandwidth isn't possible on just one physical connection. He seems to have grasped this idea from a previous discussion.

R
RIGrush
Junior Member
16
02-02-2024, 04:08 PM
#13
It's already this way.
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RIGrush
02-02-2024, 04:08 PM #13

It's already this way.

O
Oversightx
Member
166
02-04-2024, 06:44 AM
#14
They function together as a unit and are managed by the first RAM IO chip.
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Oversightx
02-04-2024, 06:44 AM #14

They function together as a unit and are managed by the first RAM IO chip.

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LolaLouie
Senior Member
742
02-05-2024, 11:02 AM
#15
RAM has collaborated with paired DIMMs over most of the past two decades.
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LolaLouie
02-05-2024, 11:02 AM #15

RAM has collaborated with paired DIMMs over most of the past two decades.

C
Coolet
Junior Member
13
02-11-2024, 10:11 PM
#16
The RAM controller is integrated within the CPU—this is the first time we've seen a chipset RAM controller in use.
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Coolet
02-11-2024, 10:11 PM #16

The RAM controller is integrated within the CPU—this is the first time we've seen a chipset RAM controller in use.

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Stromineur
Member
206
02-13-2024, 01:54 PM
#17
You're asking about how the RAM is managed in a system. The CPU includes an integrated memory controller, which handles data flow between the RAM and the processor. Each stick of RAM connects to one channel, but with only two channels available, four sticks would require more than what's physically possible.
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Stromineur
02-13-2024, 01:54 PM #17

You're asking about how the RAM is managed in a system. The CPU includes an integrated memory controller, which handles data flow between the RAM and the processor. Each stick of RAM connects to one channel, but with only two channels available, four sticks would require more than what's physically possible.

V
VWtra
Junior Member
38
02-13-2024, 03:28 PM
#18
It might work better that way. Splitting into two could improve performance and allow for additional capacity or features.
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VWtra
02-13-2024, 03:28 PM #18

It might work better that way. Splitting into two could improve performance and allow for additional capacity or features.

Y
yalo29
Senior Member
641
02-18-2024, 03:50 PM
#19
Understanding this means you're aware that a single-channel memory significantly reduces available bandwidth, essentially halving it.
Y
yalo29
02-18-2024, 03:50 PM #19

Understanding this means you're aware that a single-channel memory significantly reduces available bandwidth, essentially halving it.

G
Goranius
Member
230
02-20-2024, 05:47 PM
#20
I just noticed the changes and made them, not acting alone. We could use four channels with four sticks instead of two channels with four sticks, as the RAM slot would be reserved per lane.
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Goranius
02-20-2024, 05:47 PM #20

I just noticed the changes and made them, not acting alone. We could use four channels with four sticks instead of two channels with four sticks, as the RAM slot would be reserved per lane.

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