F5F Stay Refreshed Hardware Desktop The DDR5 RAM is not showing the expected timing value.

The DDR5 RAM is not showing the expected timing value.

The DDR5 RAM is not showing the expected timing value.

X
xYuuki14
Junior Member
27
10-24-2021, 02:02 PM
#1
observing cl 30 ram behavior, I saw some RAM entries displaying just the first three timings, such as 30-36-36. This happens because certain entries only capture a portion of the full sequence. The fourth timing, like 30-36-36-76, appears when additional data points are recorded during testing or under specific conditions. Let me know if you need more clarity!
X
xYuuki14
10-24-2021, 02:02 PM #1

observing cl 30 ram behavior, I saw some RAM entries displaying just the first three timings, such as 30-36-36. This happens because certain entries only capture a portion of the full sequence. The fourth timing, like 30-36-36-76, appears when additional data points are recorded during testing or under specific conditions. Let me know if you need more clarity!

K
KanayOne
Member
212
10-25-2021, 03:56 PM
#2
The final timing, in practice, is hardly significant. The performance gap between 30 and 128 MHz is almost undetectable, making it irrelevant to focus on. Regarding the lack of display, I have no idea, but hiding RAM details isn’t unusual.
K
KanayOne
10-25-2021, 03:56 PM #2

The final timing, in practice, is hardly significant. The performance gap between 30 and 128 MHz is almost undetectable, making it irrelevant to focus on. Regarding the lack of display, I have no idea, but hiding RAM details isn’t unusual.