s about certain technical Intel CPUs.
s about certain technical Intel CPUs.
TL;DR - Pay attention to the details! This idea really stuck with me, but now I’m curious about the deeper purpose behind E cores. On mobile, their efficiency makes sense, but for desktops it’s a different story. I noticed Intel could now fit more physical cores, and Linus mentioned in the Alder Lake review that instead of adding more cores and boosting them when all are on, they split them into P and E cores. This helps avoid hitting power and heat limits, uses silicon more wisely, and lets each core handle its workload better—especially for multi-threaded tasks. It also allows lighter tasks to run on E cores while boosting performance overall.
But I’m still puzzled: is there another motivation? One thought came to mind—E cores are grouped into clusters rather than being directly linked to the main bus. This might be a design choice to improve flexibility and scalability. However, adding clusters introduces latency and complexity. AMD already ships full power with 16 cores, but if they all run at once they throttle. Removing that throttling could make them more efficient, though thermal and power concerns remain.
For Intel, the situation is different. They stick to a monolithic approach, which seems optimal for desktop performance. The idea of splitting cores into P or E clusters could help with modularity and easier scaling, but it also adds complexity. AMD’s modular design with chiplets already offers benefits like better yields and reusability. Should Intel adopt similar strategies? Maybe by splitting cores within the same die or chiplet, rather than across different chips?
The chiplet concept is promising—it improves yields, simplifies design, and supports easier upgrades. Still, it’s unclear if Intel would benefit from this shift for desktops. The current trend seems to favor monolithic cores for desktop performance, while AMD leans into modularity. This raises questions about whether architectural evolution should prioritize flexibility or raw efficiency.
E-cores deliver higher efficiency within limited space. Four E-cores occupy the footprint of one P-core yet offer superior MT results. Rather than using 8P plus 16E like Intel might, a design focusing on 12P could be feasible, though it would likely sacrifice heat management and cause communication bottlenecks, ultimately hurting overall speed. Across all Inte’s processors, P and E cores share a common bus, except for the LNL variant. Now P and E cores reside within the same chiplet yet possess distinct buses, probably boosting P-core performance independently. This setup also enables power-saving modes where unused clusters can be turned off, including their caches on LNL. On ARL, all cores remain connected to the same ring bus, preventing overloading a single path. Another point: while LNL splits its L3 cache among clusters, ARL keeps it unified. As you noted, AMD offers 16 cores across different chiplets, whereas Intel groups them tightly within a single chiplet. AMD’s model provides more standardized options—ranging from 8x Zen5 CCDs to 16x Zen5c or even full monolithic designs. Intel, by contrast, packs many P-cores into compact packages like the Xeon lineup, which may not justify the expense on desktops. For applications that slowed down (such as gaming), the trade-off is clear.
There are numerous jobs that don’t need a high-performance processor, and chip makers set boundaries based on power, heat, and size. This suggests it could be more effective to pair powerful cores for main tasks with efficient ones for background work, reducing the need for frequent context switches from the main units.