Maximus Z690 and Alder Lake CPUs demand advanced overclocking methods.
Maximus Z690 and Alder Lake CPUs demand advanced overclocking methods.
Asus Z690, Maximus series, and Alder Lake – Top picks for top FPS gaming. First, I’d like to express my gratitude to Shamino @ ROG Asus for permitting me and the other testers to try this new equipment thoroughly and explore its overclocking features and architectural updates. Thank you also to cstkl1 and RobertoSampiao for assisting with this guide. Without their support, this project would have been impossible. Additionally, a big thank you to Skatterbencher for his clear, precise YouTube explanations of these features and for helping me prepare this manual.
Disclaimer: These configurations and methods were tested on *ENGINEERING* Qualification Sample CPUs ("QS") and pre-production boards. Therefore, some performance variations may occur—features might behave slightly differently or not at all compared to retail units. While QS samples often reflect final products, there could still be undocumented quirks, thermal issues, or missing capabilities. AVX-512 support is available on Asus boards! Some users may find this exciting, but I’m unsure if Intel originally intended it or if it was thoroughly tested. VRM limits might not suit high overclocking levels with AVX512; I encountered OCP at 5.2 GHz, so adjusting CPU Current Capacity in Digi+VRM could help. To enable AVX-512, disable all E-cores. The AVX512 offsets and clipping remain consistent with the Rocket Lake Z590 documentation.
Memory details and DDR5: DDR5 operates in a 2x32-bit mode instead of 1x64-bit. Power management (PMIC) has been relocated from the motherboard to the memory, allowing the latter to regulate its own voltage. The updated bank structure means two DDR5 sticks function similarly to a quad-channel setup. CAS latency appears less impactful on DDR5 than on DDR4. Max Trefi can reach 262k, though higher values may not offer clear benefits and could increase thermal instability risks. TRCD/TRP settings can be isolated for overclocking purposes.
YouTube tips from Transferred Review may also risk a sudden BSOD during stress tests if memory heats up or sleep mode is used. PMIC default VDD is 1.10V, but some modules require higher VDDQ (up to 50m–100mV above VDD) for optimal performance. A "high voltage" mode supports voltages exceeding 1.43V, though this involves internal register adjustments and may reset the system or prevent booting. PMIC voltages are generally synchronized per channel but can be individually configured.
For memory switching, three rails exist: VDD, VDDQ, and VPP. VCCSA (System Agent) remains active. I’ve struggled to modify it due to Micron sticks capping at 5200 XMP (5600 worked with effort). Power rails are now simplified on the board. There are two master rails—VCCIA and VCCAUX—and the IA rail manages Vcore and vGPU, while AUX handles other functions. The PMIC resides in memory, controlling actual voltage levels.
Some modules include a high-voltage bit for enhanced performance, but this can reset voltages or block booting if enabled. Secure PMIC mode is fixed at 1.435V and cannot be changed in Windows. All settings are based on the motherboard’s 5V supply.
In summary, these changes demand careful calibration—especially with voltage levels, memory controllers, and thermal management—to achieve stable, high-performance overclocks.
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Let’s start with the basics of overclocking. Traditionally, people began by adjusting the base clock or PCI frequency clock using onboard jumpers or even changing the crystal frequency. Over time, PCI speeds became tied to a fixed base "FSB," while multipliers remained. Eventually, cores were locked to the base frequency, but multipliers still existed. Later, we moved to just a "base clock" (BCLK), which was useful in certain overclocking or XOC setups—raising it also increased memory speed, so caution was needed. Still, the old approach was common: set target CPU speed, voltage, and loadline calibration, then test for stability before saving your profile.
With modern multi-core processors, experienced overclockers noticed that stress tests revealed their unstable boosts consistently failed on just a few specific cores. Tools like Prime95 became essential, especially as they could show detailed data on individual physical cores. This highlighted a problem: even with perfectly calibrated cores, the worst ones would always crash.
Some advice: disabling E-cores can push maximum clocks higher (usually +1 to 2 volts), but it also limits ring ratio and can cause instability. Disabling all E-cores can reduce ring ratio up to x50, while keeping them on keeps it lower. There’s a trade-off between voltage and stability—each enabled core requires more voltage, often around 7mV higher for each.
There are three SP ratings: P-core, E-core, and global SP. These can be found in Asus AI settings. The global SP rating is affected by these settings, though it’s unclear how exactly. For a typical CPU, P-cores might need about 1.17 volts under heavy load, while E-cores require around 1.30v. Small cores may need even less voltage—like 1.05v for full threads and 1.25v for light loads.
Thermal limits are tight: around 1.3V per die and over 210 amps of current. Maximus boards monitor CPU current, voltage, and temperature. There are three rail options: POWER RAILS, CPU Vcore, and memory controller voltages. Each has its own voltage requirements for stability and memory operation.
Some notes on settings:
- Disabling E-cores can increase max clock speeds but reduces ring ratio.
- Enabling E-cores can boost ring ratio up to x50, but may cause instability.
- Voltage increases with more enabled cores—each core needs roughly 7mV more for stability.
- Memory controller voltage and VCCSA settings matter for memory overclocking.
- IVR Transmitter and VDDQ voltages are important for memory operation.
- Standby voltage, current limits, and thermal thresholds must be respected.
For memory overclocking, you’ll need to adjust voltages carefully—especially with E-cores enabled. Tools like Prime95 can help test stability, and specific software (like Stockfish) is useful for heavy stress testing.
OC (overclocking) modes such as FLL Mode in Tweaker’s Paradise can help avoid frequency limits caused by PLL locking. OC based on samples shows different max frequencies depending on core configuration—some cores can reach up to 5400 MHz under light loads, while others cap at 4300 MHz.
OC testing can be intense: running Stockfish on all threads (16 for P-cores, 24 with E+P) requires significant voltage beyond what Cinebench R23 can handle. If you pass Stockfish, you’re likely stable with AVX instructions.
For more advanced testing, consider using AMD’s Turbo Boost features and OC TVB, which allow extra clock bins and better core prioritization. This can help manage how cores boost under different workloads.
Lastly, remember that the best approach is to understand your system’s limits—high voltages and currents are necessary for stability, but they must be balanced with thermal and power constraints. Always test cautiously and follow recommended guidelines.
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This section covers more about specific core overclocking, loadlines, suspension, and formulas. The new feature introduces voltage suspension, designed to keep voltage within a custom range based on temperatures. It was the most challenging concept to grasp, so I’ll refer to Shamino’s explanation. Cstkl1 successfully used this for high-frequency bench testing. A more technical term would describe it as a V-Clamp: if voltage is below X, set it to X; if above Y, set it to Y. It mimics dual regulator behavior—one core strictly follows the CPU VID, while the other adjusts to your needs. This is mainly useful in VID mode, especially for modifying PBO’s V/F behavior.
The Voltage Ceiling auto is set at 1.55V. You can lower it for undervolting in SVID adaptive mode. Efficiency drops up to 0.3V—meaning if the voltage before clamping is 1.5V and the ceiling is 1.3V, the result will be 1.3V. If the pre-clamp voltage is 1.5V and the ceiling is 1.1V, the result becomes (1.5-0.3)=1.2V. The Voltage Floor auto is at 0V, meaning absolute ground floor. You can raise it for scenarios where idle low-power states need higher voltage. Efficiency drops up to 0.3V as well—if the pre-clamp voltage is 0.2V and the floor is 0.4V, the result will be 0.4V. If the pre-clamp is 0.2V and the floor is 0.7V, then the result is (0.2+0.3)=0.5V. There are two modes: static and dynamic. In dynamic mode, you can define your own voltage-temperature curve. You can set higher frequencies at lower temperatures but with higher voltages. With dynamic settings, you can use both ceiling and floor dynamically, allowing a safety net like floor_low_vmin lower than ceiling_low_vmax and floor_hot_temp slightly higher than ceiling_hot_temp. This creates a smooth path for the VT curve. After setting these, the ceiling and floor will shift based on CPU temperature. Once configured, they adjust dynamically according to CPU temps. If they match perfectly, you’ll see an exact linear voltage curve. If not, you can use a graphical representation, such as the one in Skatterbencher’s video on the Crosshair AMD board. This concept is also explained in Roberto Sampiao’s new guide for ADL. It may be easier to understand visually. More details on OCTVB, adaptive and specific core overclocking, and loadlines are available.
Roberto Sampiao has discovered effective combinations of loadlines that yield good voltage and temperature results. His tests show that settings work best with low-level Loadline Calibration (Level 1 -1.7mΩ) and a slightly aggressive AC loadline (set manually to 0.6mΩ). The DC loadline should match the loadline calibration (1.7mΩ) so the VID value stays close to the active core’s value. This helps manage voltage at full load and leverages Vdroop for higher core frequencies. I still don’t fully grasp the limits, but Intel doesn’t provide V/F points between 4800MHz and 5300MHz—they’re managed by “Pcode” or interpolation. This gap is why we need a very flexible LLC to prevent overvoltage at full load.
Robert Sampiao is also working on an Excel document to help users determine optimal V/F offsets for specific core overclocking and adaptive voltages, based on their V/F table and ACLL/load targets.
Now, let’s dive into the details. This information comes from Robert Sampiao’s hard work. He spent a lot of time refining this. I admit I was overwhelmed by all these changes, but with his new specific core and adaptive voltage guide, I achieved top performance—running my two favorite cores at 5.6GHz, exceeding the 900 CPU_Z single-thread score! If you want that extra boost, he’s your go-to for guidance.
First, OCTVB involves changing the boost pulse patterns to reach higher frequencies when cooling is available. This is the I9-12900K (ES) stock core configuration: P: 52x1 – 51x2 – 50x4 – 49x8; E: 39x4 – 37x8. Full load settings could be P: 57x3 – 55x5 – 53x8, E: 42x4 – 41x6 – 40x8. For full load, P: 51x3 – 55x5 – 53x8, E: 41x4 – 40x8.
Changing the TVB (Thermal Voltage Boost) helps when workloads are low and frequencies are high, or vice versa. By adjusting TVB, you can fine-tune overclocking based on frequency needs.
Loadlines are crucial. For example, with a full load of 51x, you should set the loadline to influence overclocking as follows: low loads → low Vdroop → high voltages → high frequencies; high loads → high Vdroop → low voltages → low frequencies. You can use any LLC to configure this, depending on your processor and goals.
Maximus Z-690 Extreme LLC Impedance:
- LLC1: 1.7mΩ
- LLC2: 1.46mΩ
- LLC3: 1.1mΩ
- LLC4: 0.98mΩ
- LLC5: 0.73mΩ
- LLC6: 0.49mΩ
- LLC7: 0.24mΩ (flat)
Note: LLC8 should only be used for testing and never on fixed Vcore, except at less than 1.25V.
The DC Loadline problem is significant—many think Rocket Lake and Alder Lake use 250–350W at stock settings. The correct impedance values must match the chosen LLC to ensure accurate internal voltage and power calculations.
DC Loadline should always be set according to the selected LLC, as impedance affects how accurately the CPU performs VID and power calculations.
When using a fixed Vcore, setting the DC_LL won’t align with the CPU’s actual VID target, causing power variations. Always tune DC_LL based on your chosen LLC.
Adaptive Voltage and TVB overclock (OCTVB) rely on Vdroop to your advantage. Using less aggressive LLCs gives more flexibility for high frequencies. In short: low loads → low Vdroop, high voltages, high frequencies; high loads → high Vdroop, low voltages, low frequencies.
You can configure TVB overclock using any LLC, depending on your processor and goals.
This information could really help any serious overclocker, especially since DDR5 includes voltage regulation built-in. It’s unclear if you can adjust voltages manually if only 1.4V is supported, and whether OCPS can be turned off in the BIOS. The Maximus board is known to struggle with OC issues due to OCPS limitations; it seems like a tough setup for pushing temps beyond safe levels. This reminds me of my P5Q project—why would there be a 2.1V max setting if exceeding that triggers shutdown? It’s probably one of the worst boards on the 775 platform with MSI, given its limited FSB support.
The CPU core is offline, which explains it. The RAM stats will still be helpful for many users because RAM stats are the main factor in boosting performance without making your system feel like a heater. If you have an integrated graphics card, those stats will also show benefits.
Super happy to see the AVX 512 options being included! That and the increase in downstream bandwidth for accelerator cards (GPU's, TPU's, intel PHI etc.) should make this a great little simulation machine! Something I'm still looking to see is how disabling the e-cores effects the L3 access for the P core's. The above also means that, for AVX interested people, the 12900k is (mostly) irrelevant, and the 12700k looks like one heck of a deal. edit: Worth mentioning that by disabling the e-cores, we also get rid of a lot of the complexity around thread scheduling Edited November 4, 2021 by Camofelix added mention of not having to deal with new scheduler
Still seems to be confusion (within Intel, no less) as to whether we were supposed to get AVX 512 in the first place. Yes, CPU Current Capacity -->140% (instead of auto) avoids the OCP. I reached 105C in 2 seconds anyway so it was pointless, I was thermally limited at 5.2 ghz small FFT AVX512.= > 1.3v die sense load vcore, amps was 210A, uncoolable on 360mm AIO.
Great job! It's cool you're sharing this. I might need one too since I have an AMD right now, but I appreciate the options. I used AMD for over a decade before switching to Intel, and I only stayed with AMD because they were offering better deals. Just wanted to note that the CPU I'm looking for is the next generation after the ADL.
It looks like the Peizo cooler from the previous generation could be beneficial. Alternatively, using high-flow water cooling might help. I'm also checking in with some colleagues about AVX-512 implementation—this seems to point to the Sapphire Rapids version, which could unlock even better performance from the chip with a fresh recompile using the latest ICC/LLVM tools.