Hope AMD could integrate ten cores into one CCD chip.
Hope AMD could integrate ten cores into one CCD chip.
Engineers are correct about the actual dimensions of the gate, not just the names used in marketing. Recent nodes have mostly used transistors of similar size, and we've discovered new methods to pack more chips onto a chip. The shift to 3nm, 2nm from TSMC, and 20nm from Intel is significant—it represents a major change. It means the fundamental way CPUs are built has been altered. Transistors themselves haven't shrunk much. This explains why analog and SRAM haven't kept up with logic scaling. The planar 45nm node had a gate length of about 45nm, while a 20nm node reached 28nm (though we started to exaggerate). At 5nm, the dimensions are 51nm by 28nm, and at 3nm they're 47nm by 23nm. Since then, gate widths have increased slightly, so area loss isn't as severe as length reduction would suggest. I try not to get too deep into this; wafer manufacturing feels mysterious to me. I'm sure some details are off. The main point is that engineers are right—7nm transistors can't be made any smaller according to physics. We also haven't reached a size where planar transistors are too small for practical use, which is why the limits changed around TSCM 3nm. Some reading suggests power consumption per mm² might rise, but it doesn’t seem like a major concern for our work. It’s not just AMD—the lack of demand from customers is the real issue. Customers needing more cores per core for latency reasons want far more than 10 per core in large systems. Gamers prefer higher IPC, so reducing IPC gains to add more cores on a core-per-core basis when games don’t need many threads (under 16) is not ideal. Why?
I wasn't completely up to date with all the technical details or jargon. I came across a piece of writing by a Fab engineer from about ten years ago who said it was nearly impossible to shrink transistors below 5nm because the density would become too high and cause problems for CPUs at that scale. Back then, I was just getting into PC building and experimenting with overclocking. At the time, his prediction seemed reasonable, even though it wasn't entirely precise. Now I think things are changing. The situation is still evolving, but many people appreciate having multiple cores along with strong gaming performance. Some gamers wish for a machine with identical cores like the Ryzen 7950X but also capable of handling heavy multitasking without core parking issues. While having ten cores isn't the goal, more cores without that problem would be a big improvement. People are looking for solutions that balance power and efficiency. The Inel 14600/700/900 have become very popular among gamers because of their solid design. I'm ignoring current Intel concerns and focusing on the overall architecture. The 9950X chip has an astonishing number of transistors—about 20 billion—making it extremely compact.
5c will actually feature 32 cores per CCD, paired with two 16-core CCXs. Given its server-oriented design, the cross-CCX challenge seems minor. Keep in mind that these CCDs were originally built for Epyc products—like Zen 5, which is designed for data centers. Consumer Ryzen technology is more of an add-on. Having multiple CCDs isn’t a major concern here, as it doesn’t affect Epycs or Threadrippers. Boosting cores per CCD wouldn’t significantly improve performance or yield, especially considering past limitations like cache constraints. For an Epyc chip, whether you have 10x CCDs with 8 cores each or 8x CCDs with 10 cores each doesn’t matter much; the latter is likely more cost-effective. The shift to 4nm isn’t a drop in size—it’s just a refinement of 5nm technology. Apple’s M3 chips use 3nm, and Epyc Turin (Zen 5 dense) will follow suit. It won’t be a game-changer, but it won’t hurt either. This area is relatively minor for AMD’s overall revenue, so there’s little incentive to chase niche demands. Speculation about Zen 6 with more cores per CCD applies mainly to the denser models; the standard version will remain around 8 cores.
These processors featured four cores on each core area and lacked input/output dies.
its like a normal monolithic die. I/O lives beachside. dense and cloud are the same thing. There may be some use in mobile like we have with zen 4C I do not see the value in cutting your L3 cache just to add 3DV-cache. That's complicated, Zen 5 server chips/workstation chips are not out yet. I do agree there is a halo effect around a solid desktop enthusiast part because IT are a bunch of nerds, but it is not where the volume sale ever is. Plus as you know some of the bugs can be addressed (some, not most, just some) There have been a few before the product even launched They do I just cant see making me spend an extra 30 USD for an 8 core because AMD is literally making fewer CPUs as a great thing.
I understand. It seems 3D Cache CPUs don’t eliminate any L3 cache, does they? And if they do, it’s clear there’s an advantage—currently the 7800X-3D is arguably the fastest gaming CPU available, while newer Ryzen models lag behind because they lack 3D Cache options. People are shifting toward twin 3D V-Cache configurations instead of relying on a single high-clock CCD, like the 7950X-3D. This change helps because core frequencies are already sufficient, removing the need for core parking if both caches are similar. In reality, each CPU needs to be matched to its best use case; otherwise, performance suffers. AMD hasn’t adopted this approach yet. Dual CCD CPUs usually have one 3D cache and one standard cache, which forces core parking unless both caches match. This can cause delays since the CPU must decide which cache is optimal for a task, and Windows scheduling isn’t always accurate. As a result, the Ryzen 7800X-3D with a single cache is actually the top choice for gaming performance today—not the 7950X-3D. The 7950X-3D might be slightly faster in some scenarios because it avoids the decision-making overhead, but its limitations in gaming remain. If latency and scheduling problems weren’t an issue, there’d likely be less demand for 10-core CPUs with 3D cache. These challenges explain why AMD is pushing for more cores on a single cache unit. The 7950X-3D essentially combines the caches from a 7700X and a 7800X-3D into one chip, but it still struggles with performance and reliability. Right now, achieving a high-core-count CPU without core parking issues is limited to eight cores at best. Any promotions before launch don’t really matter if reviews haven’t been released yet. The company’s realization that they missed the mark is what led to this shift.
Zen Dense matches Zen Cloud/Zenxc concepts. These chiplet designs achieve efficiency through a new layout that reduces dark silicon and halves cache usage, lowering clock speeds.