F5F Stay Refreshed Power Users Overclocking Having trouble extracting the full performance from my CPU

Having trouble extracting the full performance from my CPU

Having trouble extracting the full performance from my CPU

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kika_BR
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10-21-2023, 07:16 AM
#1
I understand this might have been shared elsewhere. I'm currently working with a 7800X3D and attempting to use Ryzen Master for an overclock. After setting all parameters to their maximums—PPT 420W, TDC 280A, EDC 350A—I ran a multi-thread stress test using Cinebench. The results showed peak usage at 20% on PPT, 19% on TDC, and 17% on EDC. This makes me wonder if the CPU isn't performing as hard as it should.

I'm seeking advice on why this might be happening.
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kika_BR
10-21-2023, 07:16 AM #1

I understand this might have been shared elsewhere. I'm currently working with a 7800X3D and attempting to use Ryzen Master for an overclock. After setting all parameters to their maximums—PPT 420W, TDC 280A, EDC 350A—I ran a multi-thread stress test using Cinebench. The results showed peak usage at 20% on PPT, 19% on TDC, and 17% on EDC. This makes me wonder if the CPU isn't performing as hard as it should.

I'm seeking advice on why this might be happening.

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kolonelalex
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201
10-25-2023, 06:04 AM
#2
Let me guess: 7800X3d is a gaming-focused chip.
It features a large cache designed to boost the game's master thread speed.
During multithreaded tests, this cache gets emptied repeatedly, and overall performance falls short of what the base 7800 processor could achieve.
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kolonelalex
10-25-2023, 06:04 AM #2

Let me guess: 7800X3d is a gaming-focused chip.
It features a large cache designed to boost the game's master thread speed.
During multithreaded tests, this cache gets emptied repeatedly, and overall performance falls short of what the base 7800 processor could achieve.

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Azeeus
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10-30-2023, 06:26 AM
#3
I believe the issue relates to building the bus from the chip section to another part, since they rely on a serial mux method that requires buffers to preserve data width. They then increase the bus speed to boost performance, but Intel adds more internal circuits which slows down operations. They also try to overclock internally to keep up with real-time demands.
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Azeeus
10-30-2023, 06:26 AM #3

I believe the issue relates to building the bus from the chip section to another part, since they rely on a serial mux method that requires buffers to preserve data width. They then increase the bus speed to boost performance, but Intel adds more internal circuits which slows down operations. They also try to overclock internally to keep up with real-time demands.

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