F5F Stay Refreshed Hardware Desktop Gigabyte's digital twin 8+2+2 offers better performance compared to the standard 12+2+2 phase VRM.

Gigabyte's digital twin 8+2+2 offers better performance compared to the standard 12+2+2 phase VRM.

Gigabyte's digital twin 8+2+2 offers better performance compared to the standard 12+2+2 phase VRM.

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Valentin2004YT
Junior Member
1
08-30-2022, 07:58 PM
#1
While assisting a friend with his PC build, we encountered three options: the Gigabyte X870 gaming Wi-Fi 6, the B650 Aorus Elite AX V2, and the B650 Eagle AX. All three feature 12+2+2 power phases. The question is about the digital twin phase VRM—does it imply they perform equally well compared to a 16+2+2 setup? It seems odd that the B650 models offer better power phases at a lower price than the X870.
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Valentin2004YT
08-30-2022, 07:58 PM #1

While assisting a friend with his PC build, we encountered three options: the Gigabyte X870 gaming Wi-Fi 6, the B650 Aorus Elite AX V2, and the B650 Eagle AX. All three feature 12+2+2 power phases. The question is about the digital twin phase VRM—does it imply they perform equally well compared to a 16+2+2 setup? It seems odd that the B650 models offer better power phases at a lower price than the X870.

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Some_Dunkus
Member
190
09-05-2022, 01:25 PM
#2
The 8+2+2 configuration with a solid VRM heatsink already meets the needs of the 7950X, suggesting you might be focusing too narrowly on this component. The X870 chipset typically offers better power design compared to the B650, so you're likely not cutting corners here. Even with a simpler layout, the X870 should still use higher-quality VRM parts.
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Some_Dunkus
09-05-2022, 01:25 PM #2

The 8+2+2 configuration with a solid VRM heatsink already meets the needs of the 7950X, suggesting you might be focusing too narrowly on this component. The X870 chipset typically offers better power design compared to the B650, so you're likely not cutting corners here. Even with a simpler layout, the X870 should still use higher-quality VRM parts.

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jmodkiller
Member
212
09-10-2022, 03:02 PM
#3
The number of stages isn't crucial since the characteristics of each stage also play a role. You might have 8 units at 100A or 12 units at 80A, reaching a total of 960A for a chip that uses up to 300A—still excessive. The main point is that each stage supplies some power to the processor. Imagine a chip needing 140 watts at 1.4 volts—that’s 100A because 1.4 × 100 = 140. Designing a single DC-DC converter to deliver the full 100A smoothly, with minimal variation, is extremely challenging. Large components would be needed, leading to inefficiency and excessive heat. Instead, multiple smaller converters are employed to achieve the required power. In this case, you could use 4 stages each delivering up to 50A, each set at 1.4V and 25A, giving a total of 100A while keeping the processor satisfied. Each stage operates at half its peak, which boosts efficiency and reduces heat generation. The processor doesn’t draw the full 140W constantly; when idle, it might use only about 50W at 1V, resulting in just 50A per stage. Running four stages with only 12A each would be wasteful, so the VRM might switch off some stages during high loads. Alternatively, the controller cycles through phases, turning them on and off rapidly—like a pattern of activation. This allows the system to adapt quickly to changing demands, improving stability and performance. The trade-off is that all stages must stay active, consuming power even when idle, which slightly reduces overall efficiency. Digital twin essentially refers to a method where manufacturers simulate 8 or 16 distinct stages, but lack the capability to manage them individually. Instead, two stages are linked together on a single controller unit. While you still have 8 or 16 phases, they can't be switched on and off separately; only pairs are active. This approach saves costs and is practical for today’s processors, which already provide sufficient power without such granular control.
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jmodkiller
09-10-2022, 03:02 PM #3

The number of stages isn't crucial since the characteristics of each stage also play a role. You might have 8 units at 100A or 12 units at 80A, reaching a total of 960A for a chip that uses up to 300A—still excessive. The main point is that each stage supplies some power to the processor. Imagine a chip needing 140 watts at 1.4 volts—that’s 100A because 1.4 × 100 = 140. Designing a single DC-DC converter to deliver the full 100A smoothly, with minimal variation, is extremely challenging. Large components would be needed, leading to inefficiency and excessive heat. Instead, multiple smaller converters are employed to achieve the required power. In this case, you could use 4 stages each delivering up to 50A, each set at 1.4V and 25A, giving a total of 100A while keeping the processor satisfied. Each stage operates at half its peak, which boosts efficiency and reduces heat generation. The processor doesn’t draw the full 140W constantly; when idle, it might use only about 50W at 1V, resulting in just 50A per stage. Running four stages with only 12A each would be wasteful, so the VRM might switch off some stages during high loads. Alternatively, the controller cycles through phases, turning them on and off rapidly—like a pattern of activation. This allows the system to adapt quickly to changing demands, improving stability and performance. The trade-off is that all stages must stay active, consuming power even when idle, which slightly reduces overall efficiency. Digital twin essentially refers to a method where manufacturers simulate 8 or 16 distinct stages, but lack the capability to manage them individually. Instead, two stages are linked together on a single controller unit. While you still have 8 or 16 phases, they can't be switched on and off separately; only pairs are active. This approach saves costs and is practical for today’s processors, which already provide sufficient power without such granular control.