Comparison of 7950x3D CCD0 and CCD1 using Cinebench R23 with HWinfo64 data
Comparison of 7950x3D CCD0 and CCD1 using Cinebench R23 with HWinfo64 data
The setup remains consistent across runs. I reset the system data on HWinfo64 before each test, ensuring each screenshot reflects only that specific session. This approach uses the same hardware but switches between configurations—7950x3D with CCD0 and CCD1—to provide a balanced view. The focus is on comparing Zen4 and Zen4 3D v-cache performance using Cinebench R23 metrics like clock speeds, power use, temperatures, and final scores. I'm beginning with all-core runs since the data is captured in 4K, keeping file sizes manageable at around 4MB per capture. The Ryzen 7950x3D PBO at 200MHz with a -15mV curve CPPC in 'prefer cache' mode is being tested for both CCD0 and CCD1 combinations.
CCD0+CCD1 setup, one-time execution, 90C Level 2, chip directly fabricated.
CCD0 plus CCD1, one-time execution, +200MHz, -15mV, 90°C, PBO constraints turned off.
CCD0 plus CCD1, one-time execution, standard PBO configurations yet SoC operates at 1.15V
CCD1 executed once with standard PBO configurations, yet the system voltage was 1.15V.