Check availability for 10940x and 10980xe. Need quick confirmation!
Check availability for 10940x and 10980xe. Need quick confirmation!
I understand the comparison being made to the 10940x. The discussion was about purchasing a 10940x and only a 10980x if the 40x wasn't available. The 10940x was the focus in all my previous posts. It offers a maximum boost of 4.6ghz. The 3950x surpasses the 10940x in most aspects, except for overclocking. This was my concern; I should have mentioned that you can achieve similar performance with expansion cards. PCIe 4.0 x8 provides around 3.0 x16 lanes. In theory, you could have 48 lanes of PCIe 3.0, but that seems impractical for most uses. There was some stock available on Newegg for a while, but I brought up the coronavirus topic mainly to emphasize that people clearly didn't read this information. Even with more 109 series chips produced, delivery might be delayed and it would take a long time before more arrive. I'm not a fan of blind Ryzen enthusiasts—I prefer what's best. Used to run an 8700k, but as my tasks evolved and I needed more cores and higher clock speeds, I upgraded to the Ryzen 3950x. Honestly, there are several reasons why the new 109 series isn't getting much attention. A. It was mostly a paper announcement. B. The 3950x and some entry-level threadripper CPUs outperform the 109 series. C. Why is it still using 14nm? That's a lot of heat! (I don't need to point that out.)
Like this? It matches the same PCI 4.0 standards while PCI 3.0 allows up to 1GB/s per lane, meaning a 4GB SSD would require 4 lanes for PCIe 3.0 and 2 lanes for PCIe 4.0.
Bandwidth differs from actual physical electrical links. The X299 platform offers about 44-48 PCIe lanes physically, excluding the chipset. AM4 provides 20 lanes, not counting the chipset. You can't simply upgrade a PCIe 4.0 x8 connection to PCIe 3.0 x16. While you get similar speeds, there aren't enough physical wires. Swapping a 3.0 device into a 4.0 slot forces it to run at 3.0 speed. PCIe technology is about scaling down, not up. In real terms, X299 and X399/TRX40 can both support two x16 GPUs at full bandwidth and additional PCIe devices without slowing the GPU. This works without touching the chipset. Devices like the X570 or Z390 have enough wiring to handle one x16 GPU plus an M.2 slot, all without using extra chipset lanes. If you need more PCIe capacity, you can't push the GPU beyond its x16 limit. Adding a 3.0 x4 M.2 SSD into a 4.0 x2 slot means it operates at 3.0 x2 speed, not 4.0 x2 with equivalent bandwidth. The drive's performance matches its design limits; overall speed depends on the electrical connection and supported PCIe version. Understanding this distinction helps clarify how bandwidth and physical connections relate. If you require more PCIe capability, you must rely on actual physical lanes, not just higher generations. X299 or X399/TRX40 models are not compatible with Ryzen 9 or i9 consumer chips.
The setup isn't focused on physical connections but on data throughput. The device will transmit and receive information using its full capacity as long as bandwidth is present. Terms like "x8" or "x16" are just labels we use to describe speed options. A device doesn’t verify the specific port it’s connected to; it simply operates at the maximum bandwidth available, provided the hardware can handle it. For instance, attaching a graphics card to a PCIe slot labeled X1 Mini will still function (even if some pins aren’t connected), though performance may drop because the device isn’t utilizing the full bandwidth you assigned. It won’t stop working just because it’s not on the correct port. You’re mixing naming conventions that we need to clarify with what’s actually happening. There’s no distinction between PCIe 3.0 and PCIe 4.0 in terms of speed—PCIe 4.0 merely offers more lanes, increasing overall capacity. For example, linking a PCIe 4 compatible SSD to a PCIe 3.0 X16 slot would maintain the same read/write rates it can achieve, regardless of the slot type. The advantage of PCIe 4.0 lies in its ability to support fewer lanes while delivering higher total bandwidth.