AMD's upcoming mobile APU may feature Strix, utilizing a Big.Little design.
AMD's upcoming mobile APU may feature Strix, utilizing a Big.Little design.
Consider the official names that might appear upon release. I favor labeling it 4C+8c since the cores share a similar structure compared to Intel's P+E design. While both have half L3 cache and a compact layout, the latter sacrifices higher clock speeds for efficiency. For workloads that benefit from parallel threads, 2c cores should handle more tasks than 1c, which aligns with AMD's strategy. They're also expected to consume less power. The C cores stay reserved for applications needing rapid thread processing rather than sheer thread count.