5900x PPT format, TDC and EDC specifications
5900x PPT format, TDC and EDC specifications
I've located my negative offset for each core. Now I'm looking for the best PPT, TDC, and EDC that match the stock performance but aim for lower voltage and temperature. Keeping PPT near 142 gave the strongest results; lowering it hurt performance. TDC was the worst at reducing it further. EDC stayed at 140, which worked well. The lower I went, the better the outcome until a certain point was reached. Stock values: PPT - 142, TDC - 90, EDC - 140, CBR23 score 20406. Optimised values: PPT - 135, TDC - 90, EDC - 100, CBR23 score 21154. Average voltage 1.21. My concern is if lowering these parameters harms the CPU or speeds up wear over time.
I was testing my game last night and found I could lower edc significantly without losing my precise timing.
The main concern is whether maintaining stability can be achieved at a reduced EDC without using a curve optimizer.
Each CPU is unique, so the performance limits you set depend on your configuration. It won’t become unstable. Since the tap isn’t fully open, the output will be restricted.
Extending the EDC and PPT limits isn't very effective due to temperature effects. The "High Temperature Integer Threshold" resets at 70°C for AMD processor family 19h, matching family 17h. Details are available on page 353 of the "Processor Programming Reference" PPR. With a stock configuration, temperatures above 70°C cause the CPU fans to run at full duty cycle. (This makes sense?) Enjoy
Consider using PPT TDC EDC for the Ryzen 5000. Compare it to stock settings and see which suits your needs best.