F5F Stay Refreshed Hardware Desktop Transistors are constantly being miniaturized, but there are physical limits to how small they can become.

Transistors are constantly being miniaturized, but there are physical limits to how small they can become.

Transistors are constantly being miniaturized, but there are physical limits to how small they can become.

0
099Gus_
Junior Member
21
05-13-2017, 01:50 AM
#1
I understand the context of Ryzen 3000 and 4000 chips being made with 7nm technology. TSMC is preparing for 5nm production and working on 3nm plans, with even 1nm roadmaps in development. It’s unclear how long this trend can continue before the whole industry shifts to quantum computing.
0
099Gus_
05-13-2017, 01:50 AM #1

I understand the context of Ryzen 3000 and 4000 chips being made with 7nm technology. TSMC is preparing for 5nm production and working on 3nm plans, with even 1nm roadmaps in development. It’s unclear how long this trend can continue before the whole industry shifts to quantum computing.

_
_ALShehri
Member
212
05-14-2017, 04:08 AM
#2
In fact, a μm process is achievable.
_
_ALShehri
05-14-2017, 04:08 AM #2

In fact, a μm process is achievable.

M
MrEvan88
Member
114
05-14-2017, 04:57 AM
#3
Are those micrometers accurate? Since one micrometer equals 1000 nanometers, it actually represents a larger size. On the subject: https://www.quora.com/Theoretically-how-...et?share=1 The tiniest a transistor can be while remaining functional is around a few silicon atoms in width, placing it somewhere between 0.6 and 1 nanometer for the smallest possible silicon transistor. Beyond that, computing performance is likely to slow down, I'm sure.
M
MrEvan88
05-14-2017, 04:57 AM #3

Are those micrometers accurate? Since one micrometer equals 1000 nanometers, it actually represents a larger size. On the subject: https://www.quora.com/Theoretically-how-...et?share=1 The tiniest a transistor can be while remaining functional is around a few silicon atoms in width, placing it somewhere between 0.6 and 1 nanometer for the smallest possible silicon transistor. Beyond that, computing performance is likely to slow down, I'm sure.

T
tazman56
Member
222
05-14-2017, 10:58 AM
#4
The chips will simply grow larger, and we'll have to use stronger power sources once more. Maybe a new frequency conflict will arise?
T
tazman56
05-14-2017, 10:58 AM #4

The chips will simply grow larger, and we'll have to use stronger power sources once more. Maybe a new frequency conflict will arise?

I
IcerPC
Junior Member
4
05-14-2017, 02:15 PM
#5
It seems one of the two events is likely to occur as a new development emerges. However, we're probably still ten years away.
I
IcerPC
05-14-2017, 02:15 PM #5

It seems one of the two events is likely to occur as a new development emerges. However, we're probably still ten years away.

C
Crazy_Heaven
Posting Freak
811
05-15-2017, 10:32 AM
#6
Absolutely, I anticipate silicon node improvements will reach around 1 or 2nm at most. From what I understand, 2nm represents the shortest transistor length currently targeted by foundries. As dimensions shrink, electrons can actually move through gate structures, causing unintended ones—turning expected zeros into ones. This issue threatens microprocessor reliability, and the likelihood increases with further miniaturization. While quantum mechanics may play a role, it seems unlikely to dominate consumer tech in the near future. The main drivers for shrinking are packing more transistors into tighter spaces and minimizing heat, since longer wires raise resistance and generate excess warmth. Even tiny circuits accumulate significant thermal output. (Not an engineer, just what I saw in the upscaled series on Engadget.) At about 35 atoms per 7nm, electrons are still managing to pass through transistors, but quantum tunneling becomes a concern at the single-atom level. There are other materials worth exploring, like Gallium Nitride, which produces less heat than silicon or copper. While it may operate at micrometer scales rather than nanoscale, it still outperforms silicon in thermal efficiency. Currently, GaN is suited for specialized, low-performance applications, and it won’t replace silicon in mainstream microprocessors until it can handle complex architectures like RISC or CISC. We’ll likely wait a while for meaningful gains in power before silicon is overtaken by alternatives. For CPUs, we probably see a shift toward RISC designs, which simplify logic and reduce transistor counts. ARM remains popular for low-power devices, and a move to GaN or similar materials probably won’t change much in the next ten years. Until then, we might see a rebranding of Silicon Valley to something like Gallium Nitride Valley.
C
Crazy_Heaven
05-15-2017, 10:32 AM #6

Absolutely, I anticipate silicon node improvements will reach around 1 or 2nm at most. From what I understand, 2nm represents the shortest transistor length currently targeted by foundries. As dimensions shrink, electrons can actually move through gate structures, causing unintended ones—turning expected zeros into ones. This issue threatens microprocessor reliability, and the likelihood increases with further miniaturization. While quantum mechanics may play a role, it seems unlikely to dominate consumer tech in the near future. The main drivers for shrinking are packing more transistors into tighter spaces and minimizing heat, since longer wires raise resistance and generate excess warmth. Even tiny circuits accumulate significant thermal output. (Not an engineer, just what I saw in the upscaled series on Engadget.) At about 35 atoms per 7nm, electrons are still managing to pass through transistors, but quantum tunneling becomes a concern at the single-atom level. There are other materials worth exploring, like Gallium Nitride, which produces less heat than silicon or copper. While it may operate at micrometer scales rather than nanoscale, it still outperforms silicon in thermal efficiency. Currently, GaN is suited for specialized, low-performance applications, and it won’t replace silicon in mainstream microprocessors until it can handle complex architectures like RISC or CISC. We’ll likely wait a while for meaningful gains in power before silicon is overtaken by alternatives. For CPUs, we probably see a shift toward RISC designs, which simplify logic and reduce transistor counts. ARM remains popular for low-power devices, and a move to GaN or similar materials probably won’t change much in the next ten years. Until then, we might see a rebranding of Silicon Valley to something like Gallium Nitride Valley.

S
sharkface14
Junior Member
18
05-15-2017, 04:08 PM
#7
These numbers like 5nm, 7nm, and so on are mostly just industry standards set by makers. They don’t really show how small the chips are anymore. Companies have moved on to stacking layers, better gates, and other tricks to keep up with progress. Those size labels used to be a real way to compare chips, but they’re no longer the best metric. We can still say things like Intel’s Xnm is quicker than TSMC’s Xnm because even though the numbers match, the actual parts aren’t the same. Intel once claimed there was still a big leap left in silicon before it became impossible to shrink further. That doesn’t mean we can shrink 50 times smaller than 7nm—far beyond what’s practical. But when working in three dimensions, that 50x improvement actually means a much smaller volume inside the chip, roughly cutting its size by about three times in each direction.
S
sharkface14
05-15-2017, 04:08 PM #7

These numbers like 5nm, 7nm, and so on are mostly just industry standards set by makers. They don’t really show how small the chips are anymore. Companies have moved on to stacking layers, better gates, and other tricks to keep up with progress. Those size labels used to be a real way to compare chips, but they’re no longer the best metric. We can still say things like Intel’s Xnm is quicker than TSMC’s Xnm because even though the numbers match, the actual parts aren’t the same. Intel once claimed there was still a big leap left in silicon before it became impossible to shrink further. That doesn’t mean we can shrink 50 times smaller than 7nm—far beyond what’s practical. But when working in three dimensions, that 50x improvement actually means a much smaller volume inside the chip, roughly cutting its size by about three times in each direction.