Is XMP on all Intel CPUs?
Is XMP on all Intel CPUs?
It's not about a lack of support for xmp over 1600, but rather the system doesn't permit it. Only specific chipsets enable this feature. It functions similarly to auto oc, where both auto and manual modes operate as oc, but oc itself isn't supported. Xmp doesn't ensure stability.
Wait a moment, I discovered three MSI H97 boards that can support up to DDR3 2667. Therefore, my belief is whether XMP is permitted depends on the BIOS configuration, not the PCH or chipset.
Do not mix xmp with ocing. You're repeating the same error he made. Xmp is present on all Haswell chipsets and CPUs. Period.
He mentioned that many/most/all H97 mobos don't support over 1600, which means he's actually implying h97 can't handle OC RAM. But let me explain that some manufacturers have turned on ocing for certain H97, H87, B85, and H81 models.
I don't believe I'm mixing XMP with OCing, though I understand they are different concepts. What we're really discussing is what makes XMP possible—probably a BIOS feature, not the PCH or CPU. I think everyone agrees that all Haswell chips will support XMP settings, and the PCH should too, if the BIOS allows it. So it seems to depend on the BIOS. Hope my explanation made sense...
Let me check if anyone can assist in clarifying this.
EDIT: I asked Pinnhead, SR-71 and Tradesman to help sort this out, please don't mind...
Hi,
there appears to be some misunderstanding. XMP isn't a CPU capability; it's a firmware function. Specifically, it enables the firmware to read parts of the DRAM SPD that go beyond the usual JEDEC settings, allowing the system to use stored data in those areas to set up non-standard performance settings.
By default, x86 firmware always follows JEDEC standards for SDRAM as defined in the SPD (the DIMM's parameter ROM) and the memory controller's settings. This helps maintain optimal baseline performance. When these standards are followed, the chance of the memory failing completely is reduced; but if the standards aren't met, the risk of failure or inconsistent operation increases significantly.
The extent of XMP functionality depends on what the memory controller can actually do. If the controller can't be programmed to produce the clock speed required by an XMP profile, then XMP becomes ineffective. Moreover, even with a capable controller, there are many factors that could cause issues—such as signal stability, timing accuracy, and compensation for signal distortion—and a single failure can make everything unusable.
Beyond its technical role, XMP is also an Intel brand. DIMM manufacturers that want to use the XMP trademark must have their products evaluated by Intel for compatibility and performance. While Intel conducts thorough testing to confirm that XMP-enabled memory works well outside JEDEC guidelines, it doesn't offer a warranty like it does when the memory is built within those specifications.
Many users push the limits further by using multiple identical DIMMs. In contrast, a single DIMM (one per channel) is tested for proper compatibility with XMP alone. Pairing two DIMMs together may require extra adjustments beyond just enabling XMP.
Thank you for your message. You mentioned earlier that XMP is a firmware feature, not related to the CPU (MC) or PCH (Chipset) features. The MC should indeed be able to manage the XMP profile, along with the correct bus clock, CL and voltage. The PCH doesn’t play a role in this context since the MC is now integrated into the CPU.
For your hypothetical setup, I’m curious—does the motherboard support DDR3-1333/1600/1866/2133/2200 and can it handle an i5-4440 with a 1.65V supply? Also, would using 1.65V be suitable for this board?
Thanks!
I appreciate the time you took to assist us. I reached out after our previous discussion about DRAM, as you suggested a helpful resource. You mentioned XMP is indeed a firmware capability, not related to the CPU (MC) or PCH (Chipset) features. The MC should be able to manage the XMP profile, along with the correct bus clock, CL, and voltage, as you understood. The PCH doesn’t play a role in this context since the MC is now integrated into the CPU.
For clarity, I posed a hypothetical scenario: I have an MSI H97 Guard-Pro LGA1150 motherboard supporting various speeds. I’m using an i5-4440 and a DDR3 2133 CL10 1.6V 2x8GB module. I’m wondering if the MC can handle this setup and if operating at 1.65V would be suitable.
That’s accurate. BIOS refers to older PC firmware standards, while UEFI is the current standard. The firmware instructions are stored on a ROM connected to the PCH through an LPC bus.