Horizon question remains open.
Horizon question remains open.
I understand the posting time, but this data comes from before that. I just noticed it now and am posting. Essentially, recently MemCon discussed a new approach: instead of fetching data from one module at a time, you can retrieve both simultaneously using a buffer chip. This method could initially be used for servers, offering improved bandwidth—potentially doubling it—though it might increase latency. It seems this technology is likely limited to capacities around 2R (32GB) or higher, meaning lower capacities probably won’t work. I’m also curious about the possibility of "4R" modules, which would allow dual 2R operations inside one unit. Overall, this resembles boosting the number of channels within a module, though higher module-to-memory transfer speeds might become the main constraint. For more details, I came across this link: https://www.prnewswire.com/news-releases...97691.html Last year, SK Hynix mentioned their MCR DIMM concept, which seems similar to MRDIMM but possibly a different standard or variation.
If there's a Mr Dimm, is there a Mrs Dimm? Just asking. In any case, it's interesting. I'm all for "faster" stuff. I'm just surprised it took so long for this to happen. But what is this "realistic bandwidth needs" for the 203x ? Which application truly benefit in a nonmarginal way from RAM speed over CPU speed? I tried looking it up, but for most stuff, it seems to barely even matter ? Is this for some very specific application?
The event will likely center on enterprise and high-performance computing tasks, not everyday consumer use. It’s hard to imagine typical daily activities gaining much from quicker RAM, though some gaming setups do show improvement. The 7zip benchmarks seem like a close alternative, but they’re rarely used on large datasets in practice. AMD can help by improving cache sizes, which might make faster RAM more valuable for certain applications. If memory were sufficiently fast, large caches wouldn’t be necessary. For me, the focus is on compute-heavy work, especially memory-heavy tasks like Prime95 workloads. The absence of affordable high-end DRAM remains a significant challenge.