Comparing SMT settings for the 3950X and 3800X models
Comparing SMT settings for the 3950X and 3800X models
I observed a project on PCPP where someone upgraded a 3950X with SMT disabled for his workstation. He believed it improved performance. I hadn't commented on his choice but noted the benefits likely included lower power use, higher frequency, and possibly better single-core speed. I questioned his decision without providing feedback. It seems SMT disabled would free up resources, but I wasn't sure exactly what was gained or lost. For instance, a 16C/32T chip changed to 16C/16T versus an 8C/16T chip—what changes occur? On Intel systems, separate threads might use different parts of the core, like the FPU being exclusive to one thread. At some point, I recalled AMD designs where each core had its own FPU and ALU, similar to hyperthreading. I wondered about cache access—would each thread have its own cache? I wish I could study the Zen 2 diagrams on wikichip or even the Coffee Lake refresh schematics to see real differences without testing.
Reducing SMT latency offers some advantages for gaming or single-core programs, yet it results in a 30% drop for complex multithreaded tasks.
I'm curious about cache availability, the size of the cache, and access to components<|pad|>, such as the ALU and FPU. Also, I want to understand the distinctions between Intel's hyper threading and AMD's SMT in Zen 2. Regarding the differences between the 9900K and 9700K, I'm interested in their cache structures and clock speeds. You mentioned the frequency differences are mainly due to the high bin in the 9900K, is that correct?