Calculate DRAM latency using dual, triple, and quad levels.
Calculate DRAM latency using dual, triple, and quad levels.
DRAM calculators often provide single-rank figures. A knowledgeable overclocker noted that multiple ranks reduce CAS latency impact, explaining why more ranks can boost speed. The logic suggests dividing CAS latency by the number of ranks. Your examples illustrate this trend—higher speeds with more ranks. It seems DRAM tools haven't adopted multiple-rank support yet.
The main schedules with extra ranks are mostly unimportant, particularly for quad rank. But the secondary schedules will have a big impact on performance, so success depends on your skill, luck, and IMC quality.
so it seems they're mainly relevant when you stick to single rank. that cl doesn't really matter much compared to the secondary and tertiary specs, but dual rank always outperforms single rank in speed. clock-wise it's clear, and quad rank is only marginally better or similar. i don’t really focus on theory—just aim for the fastest performance possible. right now, i’m just checking frequency and don’t think tri rank is worth it unless you’re using specific tools or iops. i don’t see much benefit from tri rank beyond compatibility issues, especially with mixed capacity boards.
performance-wise, quad rank usually hits its limits before dual rank, especially on older boards. i’d probably run dual rank for better speed and capacity, unless you need the extra density of quad.
for iops, 2gbit is still better than 4gbit or DDR3, and i’d have preferred something like DDR5 if possible. the 4gbit chips are really slow, and you’ll hit limits long before quad rank.
if you’re curious about tri rank, it’s mostly a hassle unless you’re using certain boards or iops. i’d rather spend time tuning in groups or checking OC profiles instead of guessing.
Quad Rank performs better when you understand the issues and address them. I invested many weeks fine-tuning my DDR4 Quad Rank configuration on Ryzen. I achieved 3800MT/s CL14 T1 (GDM OFF with extensive resistance adjustments), yet stability remained elusive. Switching from GDM OFF to ON provided a major stability improvement, though I could have tweaked it further. I’m now settling on 3733MTs. Turning GDM ON versus OFF doesn’t noticeably affect performance beyond a small error margin. CL14 and CL18 show similar results as long as tFAW, tRRDS, and tRRDL are properly configured—these components mainly influence performance. Another aspect is tRFC; on Zen4 it makes a noticeable difference, but on my E-Die it’s hard to optimize without excessive voltage and cooling. That means I’m at roughly average tRFC, which is acceptable for QR setups. SCL timings are inconsistent; some tasks perform better with tight timing, while others thrive with loose timing.
It seems like you're trying to make sense of the situation. More ranks usually mean better performance, but some people might be struggling with skill or using overclocking tricks that don't work. It looks like they're dealing with voltage issues or IC limitations, especially if they're pushing temps high. The idea that RAM timings matter more than voltage is worth noting. Many users are careful with RAM speeds and voltages, but it can be tricky. If you're seeing stability issues, it might be due to hardware constraints rather than just tuning. Also, some people prefer simpler setups for reliability. Keep an eye on community advice and consider testing different configurations to find what works best.
In reality, 2T with GDM OFF presents greater challenges compared to 1T with GDM ON on my configuration if I aim for theoretical benefits like shifting to an uneven CAS such as from 16 to 15. With GDM ON, the system always rounds up to the nearest even number, making CL14 more manageable than CL15. However, it doesn’t provide a real speed boost over CL16 and demands 1.55V for DRAM versus just 1.42V. This difference stems from how tCWL, tRDWR, and tWRRD timings are determined, so I’d need to use looser settings that hurt performance or risk not booting. Figuring this out required numerous CMOS resets.
I’m sharing insights from my experience with Ryzen DRAM, though results may vary with Intel. I wouldn’t waste time if I didn’t have a laptop and Steam Deck occupied during memory tests, as my PC became unusable for nearly a month. My sample size is small, so I can’t generalize.
I’m unsure about the feasibility of running tRRDS=4, tRRDL=6, or tFAW=16 on most QR sticks. It’s unclear how many people can reliably run Quad Rank at decent speeds, especially since even at JEDEC 2133MT/s my setup would be unstable without increasing DRAM current capacity from the default 100% in BIOS to 120%. This is something you rarely see, and most motherboards don’t offer this setting. I also had to tweak resistance parameters in ProcODT and ClkDrvStr, which usually means relying on trial and error with a lot of patience.
Micron E-die is my choice. I run two separate kits of 2x16GB (total 2x2x16GB). Currently, I can achieve tRFC slightly tighter, but it’s already near the limit at 560 and failed after about 12 hours of stress testing, so I raised it to 580—without issues. tRCDWR and tRCDRD at 21 seem excessively high, needing impractical voltages for stability. I managed to tighten them further to 17 or 16, but performance didn’t improve noticeably.
tWR12 and tRP6 have been stable for many hours, though I faced errors due to the tRFC setting. Lowering it helped, but I never saw a performance gain. tRFC is now the main bottleneck. I can either push to 3800MT/s (requiring ~620 tRFC and more voltage, boosting y-cruncher and Linpack performance) or settle for it. Unfortunately, active cooling is necessary at that point, which I’m not willing to do.
[Link to reference]
https://hwbot.org/submission/5541773_wer...x3d_920_cb
These newer systems seem quite complex with many factors to weigh compared to the simpler setup of this older board that only needs a single gigabyte chip to reach high speeds if I use DDR4. I’ll likely focus on CEZANE with a 1:1 clock frequency, which can handle around 5000 cycles or more with a voltage of over 1.35V versus the OC, though quad rank options look promising and might reach similar speeds as top-tier boards like the ASRock B450. The quad rank could possibly clock above 4400 with a good IMCC, provided the voltage is managed properly—just needs a voltage regulator due to the 1.4V max on the DIMM (1.5V on K4). Next up could be 13th or 14th gen chips for speeds above 5400, but I’ll need a board that’s reliable enough to run it on two sticks; quad sticks might only be practical for higher-end builds since I doubt any board can handle those speeds with four sticks. I’m expecting some delays and timing changes, especially with voltage limits. This setup seems to depend on balancing CPU and RAM performance, aiming for a bit more headroom in stability rather than just boosting speeds. I’d prefer a board that can handle lower voltages for better reliability, even if it means slightly slower clock speeds. I’m not close to the RAM limit, so even 2800MHz with dual sticks should work fine, though I’m unsure how much tuning will be needed or what timing issues might arise. Overall, it’s a mix of CPU and memory considerations that will shape the final performance.
The design seems to have some challenges compared to the previous Hynix + Samsung setups. Would you like a better formula suggestion?
Formulas appear acceptable on paper and in theory, yet actual outcomes can differ significantly based on the workload type. For the Aida64 latency test specifically, this approach is suitable since Aida focuses mainly on CAS benchmarks.